Codasip has launched SecuRISC5, an initiative that looks to provide its customers with safe and secure custom compute using highly verified reference designs combining Codasip IP and third-party ...

Codasip, a specialist in customisable RISC-V processor IP, has announced that SiliconArts has adopted application-specific Codasip 7-series RISC-V processors with Codasip Studio customisation tools.

TÜV SÜD has audited and certified the company’s IP hardware development according to ISO 26262 and ISO/SAE 21434 Munich, Germany, 1 February 2024 – Codasip®, the leader in RISC-V Custom Compute, ...

EnSilica and Codasip have announced a strategic partnership to bring CHERI cybersecurity to automotive, critical national infrastructure, defence and aerospace applications EnSilica, the ASIC ...

Codasip has launched a complete exploration platform to accelerate CHERI adoption. Codasip Prime comprises pre-silicon hardware and software development kits to realise state-of-the-art memory-safe ...

(MENAFN- Pressat) Europe's RISC-V leader to provide a customizable general-purpose processor for the €240M initiative Munich, Germany, 6 March 2025–Codasip, the European RISC-V leader, announced that ...

Munich, Germany, 1 December 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today announced it is collaborating with Intel® to enable undergraduate and graduate ...

Munich, Germany; Seoul, South Korea – 2 November 2022 – Codasip, the leader in customizable RISC-V processor IP, today announced that SiliconArts has adopted application-specific Codasip 7-series RISC ...