IEEE

Parallelized CNN Architecture for Handwritten Digit Recognition on FPGA via Verilog Implementation

Abstract: This research focuses on implementing a Convolutional Neural Network based handwritten digit recognition system on an FPGA (Field Programmable Gate Array), specifically focusing on utilizing ...
IEEE

Autoencoder-Augmented Graph Neural Networks for Accurate and Scalable Structure Recognition in Analog/Mixed-Signal Schematics

Abstract: The increasing complexity of Analog/Mixed-Signal (AMS) schematics has been posing significant challenges in structure recognition, particularly in the intellectual property (IP) industry, ...